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https://github.com/fluencelabs/wasmer
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Add comments to indicate the implemention we'd like to have, but can't right now.
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@ -2823,30 +2823,34 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
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&mut self.machine,
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&mut self.machine,
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&mut self.value_stack,
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&mut self.value_stack,
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|a, src1, src2, dst| {
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|a, src1, src2, dst| {
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// TODO: use temp_gpr (or at least check that src2 isn't
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// TODO: we don't have access to 'machine' here.
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// XMMOrMemory that uses AX or DX.
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//let tmp1 = self.machine.acquire_temp_gpr().unwrap();
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a.emit_mov(Size::S32, Location::XMM(src1), Location::GPR(GPR::RAX));
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//let tmp2 = self.machine.acquire_temp_gpr().unwrap();
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let tmp1 = GPR::RAX;
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let tmp2 = GPR::RDX;
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a.emit_mov(Size::S32, Location::XMM(src1), Location::GPR(tmp1));
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match src2 {
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match src2 {
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XMMOrMemory::XMM(x) => {
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XMMOrMemory::XMM(x) => {
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a.emit_mov(Size::S32, Location::XMM(x), Location::GPR(GPR::RDX))
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a.emit_mov(Size::S32, Location::XMM(x), Location::GPR(tmp2))
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}
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XMMOrMemory::Memory(base, disp) => {
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a.emit_mov(Size::S32, Location::Memory(base, disp), Location::GPR(tmp2))
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}
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}
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XMMOrMemory::Memory(base, disp) => a.emit_mov(
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Size::S32,
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Location::Memory(base, disp),
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Location::GPR(GPR::RDX),
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),
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};
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};
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let tmp_xmm = if dst != src1 && XMMOrMemory::XMM(dst) != src2 {
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let (tmp_xmm, _release_tmp_xmm) = if dst != src1 && XMMOrMemory::XMM(dst) != src2
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dst
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{
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(dst, false)
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} else {
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} else {
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// TODO: we don't have access to 'machine' here.
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//(self.machine.acquire_temp_xmm().unwrap(), true)
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if src1 == XMM::XMM0 {
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if src1 == XMM::XMM0 {
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if src2 == XMMOrMemory::XMM(XMM::XMM1) {
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if src2 == XMMOrMemory::XMM(XMM::XMM1) {
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XMM::XMM2
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(XMM::XMM2, false)
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} else {
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} else {
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XMM::XMM1
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(XMM::XMM1, false)
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}
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}
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} else {
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} else {
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XMM::XMM0
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(XMM::XMM0, false)
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}
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}
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};
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};
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match src2 {
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match src2 {
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@ -2863,7 +2867,7 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
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let do_vminss = a.get_label();
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let do_vminss = a.get_label();
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a.emit_jmp(Condition::NotEqual, do_vminss);
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a.emit_jmp(Condition::NotEqual, do_vminss);
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a.emit_jmp(Condition::ParityEven, do_vminss);
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a.emit_jmp(Condition::ParityEven, do_vminss);
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a.emit_cmp(Size::S32, Location::GPR(GPR::RAX), Location::GPR(GPR::RDX));
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a.emit_cmp(Size::S32, Location::GPR(tmp1), Location::GPR(tmp2));
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a.emit_jmp(Condition::Equal, do_vminss);
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a.emit_jmp(Condition::Equal, do_vminss);
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static NEG_ZERO: u128 = 0x80000000;
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static NEG_ZERO: u128 = 0x80000000;
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match src2 {
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match src2 {
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@ -2871,12 +2875,12 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
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a.emit_mov(
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a.emit_mov(
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Size::S64,
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Size::S64,
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Location::Imm64((&NEG_ZERO as *const u128) as u64),
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Location::Imm64((&NEG_ZERO as *const u128) as u64),
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Location::GPR(GPR::RDX),
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Location::GPR(tmp2),
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);
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);
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a.emit_mov(Size::S64, Location::Memory(GPR::RDX, 0), Location::XMM(x));
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a.emit_mov(Size::S64, Location::Memory(tmp2, 0), Location::XMM(x));
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}
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}
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XMMOrMemory::Memory(base, disp) => {
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XMMOrMemory::Memory(base, disp) => {
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let neg_zero_base = if base == GPR::RDX { GPR::RAX } else { GPR::RDX };
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let neg_zero_base = if base == tmp2 { tmp1 } else { tmp2 };
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a.emit_mov(
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a.emit_mov(
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Size::S64,
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Size::S64,
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Location::Imm64((&NEG_ZERO as *const u128) as u64),
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Location::Imm64((&NEG_ZERO as *const u128) as u64),
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@ -2891,6 +2895,8 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
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};
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};
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a.emit_label(do_vminss);
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a.emit_label(do_vminss);
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a.emit_vminss(src1, src2, dst);
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a.emit_vminss(src1, src2, dst);
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// TODO: we don't have access to 'machine' here.
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//if release_tmp_xmm { self.machine.release_temp_xmm(tmp_xmm) }
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},
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},
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),
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),
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Operator::F32Eq => Self::emit_fp_cmpop_avx(
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Operator::F32Eq => Self::emit_fp_cmpop_avx(
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