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https://github.com/fluencelabs/wasmer
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movzx/movsx
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8a91f801b9
commit
5f8b289751
@ -654,8 +654,7 @@ impl Emitter for Assembler {
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binop_all_nofp!(and, self, sz, src, dst, { unreachable!("and") });
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}
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fn emit_or(&mut self, sz: Size, src: Location, dst: Location) {
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//binop_all_nofp!(or, self, sz, src, dst, { unreachable!("or") });
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unimplemented!("instruction");
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binop_all_nofp!(orr, self, sz, src, dst, { unreachable!("or") });
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}
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fn emit_lzcnt(&mut self, sz: Size, src: Location, dst: Location) {
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match sz {
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@ -742,10 +741,64 @@ impl Emitter for Assembler {
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fn emit_popcnt(&mut self, sz: Size, src: Location, dst: Location) {
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unimplemented!("instruction")
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}
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fn emit_movzx(&mut self, sz_src: Size, src: Location, sz_dst: Size, dst: Location) {
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unimplemented!("instruction")
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fn emit_movzx(&mut self, sz_src: Size, src: Location, _sz_dst: Size, dst: Location) {
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match (sz_src, src, dst) {
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(Size::S8, Location::GPR(src), Location::GPR(dst)) => {
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dynasm!(self ; uxtb W(map_gpr(dst).x()), W(map_gpr(src).x()));
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}
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(Size::S16, Location::GPR(src), Location::GPR(dst)) => {
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dynasm!(self ; uxth W(map_gpr(dst).x()), W(map_gpr(src).x()));
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}
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(Size::S8, Location::Memory(src, disp), Location::GPR(dst)) => {
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assert!(disp >= 0);
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dynasm!(self ; ldrb W(map_gpr(dst).x()), [X(map_gpr(src).x()), disp as u32]);
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}
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(Size::S16, Location::Memory(src, disp), Location::GPR(dst)) => {
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assert!(disp >= 0);
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dynasm!(self ; ldrh W(map_gpr(dst).x()), [X(map_gpr(src).x()), disp as u32]);
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}
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_ => unreachable!(),
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}
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}
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fn emit_movsx(&mut self, sz_src: Size, src: Location, sz_dst: Size, dst: Location) {
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match (sz_src, src, sz_dst, dst) {
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(Size::S8, Location::GPR(src), Size::S32, Location::GPR(dst)) => {
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dynasm!(self ; sxtb W(map_gpr(dst).x()), W(map_gpr(src).x()));
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}
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(Size::S16, Location::GPR(src), Size::S32, Location::GPR(dst)) => {
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dynasm!(self ; sxth W(map_gpr(dst).x()), W(map_gpr(src).x()));
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}
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(Size::S8, Location::Memory(src, disp), Size::S32, Location::GPR(dst)) => {
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assert!(disp >= 0);
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dynasm!(self ; ldrb W(map_gpr(dst).x()), [X(map_gpr(src).x()), disp as u32]; sxtb W(map_gpr(dst).x()), W(map_gpr(dst).x()));
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}
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(Size::S16, Location::Memory(src, disp), Size::S32, Location::GPR(dst)) => {
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assert!(disp >= 0);
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dynasm!(self ; ldrh W(map_gpr(dst).x()), [X(map_gpr(src).x()), disp as u32]; sxth W(map_gpr(dst).x()), W(map_gpr(dst).x()));
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}
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(Size::S8, Location::GPR(src), Size::S64, Location::GPR(dst)) => {
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dynasm!(self ; sxtb X(map_gpr(dst).x()), W(map_gpr(src).x()));
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}
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(Size::S16, Location::GPR(src), Size::S64, Location::GPR(dst)) => {
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dynasm!(self ; sxth X(map_gpr(dst).x()), W(map_gpr(src).x()));
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}
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(Size::S32, Location::GPR(src), Size::S64, Location::GPR(dst)) => {
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dynasm!(self ; sxtw X(map_gpr(dst).x()), W(map_gpr(src).x()));
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}
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(Size::S8, Location::Memory(src, disp), Size::S64, Location::GPR(dst)) => {
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assert!(disp >= 0);
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dynasm!(self ; ldrb W(map_gpr(dst).x()), [X(map_gpr(src).x()), disp as u32]; sxtb X(map_gpr(dst).x()), W(map_gpr(dst).x()));
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}
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(Size::S16, Location::Memory(src, disp), Size::S64, Location::GPR(dst)) => {
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assert!(disp >= 0);
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dynasm!(self ; ldrh W(map_gpr(dst).x()), [X(map_gpr(src).x()), disp as u32]; sxth X(map_gpr(dst).x()), W(map_gpr(dst).x()));
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}
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(Size::S32, Location::Memory(src, disp), Size::S64, Location::GPR(dst)) => {
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assert!(disp >= 0);
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dynasm!(self ; ldrh W(map_gpr(dst).x()), [X(map_gpr(src).x()), disp as u32]; sxtw X(map_gpr(dst).x()), W(map_gpr(dst).x()));
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}
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_ => unreachable!(),
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}
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unimplemented!("instruction")
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}
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