mirror of
https://github.com/fluencelabs/wasmer
synced 2024-12-14 06:35:40 +00:00
Implemented missing integer operators and fixed division.
This commit is contained in:
losfair
parent
5a97a25e7c
commit
27b2061ffd
@ -517,64 +517,89 @@ impl X64FunctionCode {
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signed: bool,
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out: Register,
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) {
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let dx_used = Register::RDX.is_used(value_stack);
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if dx_used {
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let dx_save =
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Register::RDX.is_used(value_stack) && left != Register::RDX && right != Register::RDX;
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if dx_save {
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dynasm!(
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assembler
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; push rdx
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);
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}
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if right == Register::RAX {
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dynasm!(
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assembler
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; push r15
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; mov r15d, Rd(right as u8)
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; mov eax, Rd(left as u8)
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; mov edx, 0
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);
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if signed {
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dynasm!(
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assembler
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; push rax
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; mov eax, Rd(left as u8)
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; mov edx, 0
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; mov Rd(left as u8), [rsp]
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);
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if signed {
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dynasm!(
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assembler
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; idiv Rd(left as u8)
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);
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} else {
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dynasm!(
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assembler
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; div Rd(left as u8)
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);
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}
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dynasm!(
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assembler
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; mov Rd(left as u8), Rd(out as u8)
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; pop rax
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; idiv r15d
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);
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} else {
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dynasm!(
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assembler
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; mov eax, Rd(left as u8)
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; mov edx, 0
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; div r15d
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);
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if signed {
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dynasm!(
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assembler
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; idiv Rd(right as u8)
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);
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} else {
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dynasm!(
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assembler
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; div Rd(right as u8)
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);
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}
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}
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dynasm!(
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assembler
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; mov Rd(left as u8), Rd(out as u8)
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; pop r15
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);
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if dx_save {
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dynasm!(
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assembler
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; mov Rd(left as u8), Rd(out as u8)
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; pop rdx
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);
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}
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}
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fn emit_div_i64(
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assembler: &mut Assembler,
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value_stack: &ValueStack,
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left: Register,
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right: Register,
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signed: bool,
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out: Register,
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) {
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let dx_save =
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Register::RDX.is_used(value_stack) && left != Register::RDX && right != Register::RDX;
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if dx_save {
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dynasm!(
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assembler
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; push rdx
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);
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}
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if dx_used {
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dynasm!(
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assembler
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; push r15
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; mov r15, Rq(right as u8)
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; mov rax, Rq(left as u8)
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; mov rdx, 0
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);
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if signed {
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dynasm!(
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assembler
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; idiv r15
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);
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} else {
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dynasm!(
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assembler
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; div r15
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);
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}
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dynasm!(
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assembler
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; mov Rq(left as u8), Rq(out as u8)
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; pop r15
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);
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if dx_save {
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dynasm!(
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assembler
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; pop rdx
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@ -627,7 +652,7 @@ impl X64FunctionCode {
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fn emit_peek_into_ax(
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assembler: &mut Assembler,
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value_stack: &ValueStack,
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) -> Result<(), CodegenError> {
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) -> Result<WpType, CodegenError> {
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let val = match value_stack.values.last() {
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Some(x) => *x,
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None => {
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@ -652,7 +677,7 @@ impl X64FunctionCode {
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}
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}
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Ok(())
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Ok(val.ty)
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}
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fn emit_pop_into_reg(
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@ -1389,6 +1414,33 @@ impl FunctionCodeGenerator for X64FunctionCode {
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);
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}
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}
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Operator::TeeLocal { local_index } => {
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let local_index = local_index as usize;
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if local_index >= self.locals.len() {
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return Err(CodegenError {
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message: "local out of bounds",
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});
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}
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let local = self.locals[local_index];
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let ty = Self::emit_peek_into_ax(assembler, &self.value_stack)?;
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if ty != local.ty {
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return Err(CodegenError {
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message: "TeeLocal type mismatch",
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});
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}
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if is_dword(get_size_of_type(&ty)?) {
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dynasm!(
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assembler
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; mov [rbp - (local.stack_offset as i32)], eax
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);
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} else {
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dynasm!(
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assembler
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; mov [rbp - (local.stack_offset as i32)], rax
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);
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}
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}
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Operator::I32Const { value } => {
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let location = self.value_stack.push(WpType::I32);
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match location {
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@ -1396,7 +1448,7 @@ impl FunctionCodeGenerator for X64FunctionCode {
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let reg = Register::from_scratch_reg(x);
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dynasm!(
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assembler
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; mov Rq(reg as u8), value
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; mov Rd(reg as u8), value
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);
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}
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ValueLocation::Stack => {
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@ -1547,6 +1599,23 @@ impl FunctionCodeGenerator for X64FunctionCode {
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},
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)?;
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}
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Operator::I32Ne => {
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Self::emit_binop_i32(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, left, right| {
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dynasm!(
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assembler
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; cmp Rd(left as u8), Rd(right as u8)
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; lahf
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; shr ax, 14
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; and eax, 1
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; xor eax, 1
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; mov Rd(left as u8), eax
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);
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},
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)?;
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}
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Operator::I32Eqz => {
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Self::emit_unop_i32(
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assembler,
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@ -1568,6 +1637,42 @@ impl FunctionCodeGenerator for X64FunctionCode {
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},
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)?;
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}
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Operator::I32Clz => {
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Self::emit_unop_i32(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, reg| {
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dynasm!(
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assembler
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; lzcnt Rd(reg as u8), Rd(reg as u8)
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);
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},
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)?;
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}
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Operator::I32Ctz => {
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Self::emit_unop_i32(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, reg| {
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dynasm!(
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assembler
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; tzcnt Rd(reg as u8), Rd(reg as u8)
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);
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},
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)?;
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}
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Operator::I32Popcnt => {
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Self::emit_unop_i32(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, reg| {
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dynasm!(
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assembler
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; popcnt Rd(reg as u8), Rd(reg as u8)
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);
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},
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)?;
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}
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// Comparison operators.
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// https://en.wikibooks.org/wiki/X86_Assembly/Control_Flow
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// TODO: Is reading flag register directly faster?
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@ -1739,16 +1844,68 @@ impl FunctionCodeGenerator for X64FunctionCode {
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)?;
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}
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Operator::I64DivU => {
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unimplemented!();
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Self::emit_binop_i64(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, left, right| {
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Self::emit_div_i64(
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assembler,
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value_stack,
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left,
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right,
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false,
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Register::RAX,
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);
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},
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)?;
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}
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Operator::I64DivS => {
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unimplemented!();
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Self::emit_binop_i64(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, left, right| {
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Self::emit_div_i64(
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assembler,
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value_stack,
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left,
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right,
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true,
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Register::RAX,
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);
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},
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)?;
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}
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Operator::I64RemU => {
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unimplemented!();
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Self::emit_binop_i64(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, left, right| {
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Self::emit_div_i64(
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assembler,
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value_stack,
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left,
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right,
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false,
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Register::RDX,
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);
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},
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)?;
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}
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Operator::I64RemS => {
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unimplemented!();
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Self::emit_binop_i64(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, left, right| {
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Self::emit_div_i64(
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assembler,
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value_stack,
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left,
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right,
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true,
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Register::RDX,
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);
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},
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)?;
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}
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Operator::I64And => {
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Self::emit_binop_i64(
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@ -1792,6 +1949,25 @@ impl FunctionCodeGenerator for X64FunctionCode {
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WpType::I32,
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)?;
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}
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Operator::I64Ne => {
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Self::emit_binop(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, left, right| {
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dynasm!(
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assembler
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; cmp Rq(left as u8), Rq(right as u8)
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; lahf
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; shr ax, 14
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; and eax, 1
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; xor eax, 1
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; mov Rd(left as u8), eax
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);
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},
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WpType::I64,
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WpType::I32,
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)?;
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}
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Operator::I64Eqz => {
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Self::emit_unop(
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assembler,
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@ -1815,6 +1991,42 @@ impl FunctionCodeGenerator for X64FunctionCode {
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WpType::I32,
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)?;
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}
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Operator::I64Clz => {
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Self::emit_unop_i64(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, reg| {
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dynasm!(
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assembler
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; lzcnt Rq(reg as u8), Rq(reg as u8)
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);
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},
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)?;
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}
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Operator::I64Ctz => {
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Self::emit_unop_i64(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, reg| {
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dynasm!(
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assembler
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; tzcnt Rq(reg as u8), Rq(reg as u8)
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);
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},
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)?;
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}
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Operator::I64Popcnt => {
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Self::emit_unop_i64(
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assembler,
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&mut self.value_stack,
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|assembler, value_stack, reg| {
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dynasm!(
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assembler
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; popcnt Rq(reg as u8), Rq(reg as u8)
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);
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},
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)?;
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}
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// Comparison operators.
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// https://en.wikibooks.org/wiki/X86_Assembly/Control_Flow
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// TODO: Is reading flag register directly faster?
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